Closing Date: 27th January 2018
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Tape Out Engineering (OPC) Principal Engineer/ Senior Engineer/ Engineer

Salary: 0.00


•         To generate new test patterns and analyze test pattern for model coverage enhancement.

•         To develop automation script to increase productivity of physical layout design using programming languages such as: Perl, SKILL (Cadence), or/and UNIX Shell.

•         To develop new model and recipe for 140nm OPC and wafer fabrication verification.

•         To handle development and engineering tapeouts which require non-standard frame and prime die data handling while establishing a production friendly way of working for Operation team after development phase.

•         To work closely with Technology Development team, Process integration team and Product Engineering team to resolve customers design issues and improve the product yield.

•         To work with Tapeout Operation team to develop automation scripts (Perl, TCL, Shell) and systems to streamline tapeout processes.

•         Responsible for automation script documentation and management.

•         To lead productivity projects and ensure project closure according to project timeline.

•         To deliver value added services to customers through DFM, yield enhancement projects and engineering requests activities.


•         Minimum Bachelor Degree in Electrical and Electronics or Micro-Electronics Engineering.

•         Minimum 3 years of relevant experience in OPC model development and wafer fabrication.

•         Knowledge in UNIX/LINUX, Cadence Virtuoso and/or Cadence SKILL scripting is a must.

•         Knowledge in Shell, Perl, TCL programming is required.

•         Familiarity with Synopsys CATS, Cadence PVS and/or Mentor Graphics Calibre for rule-based OPC will be added advantage.

•         Can work independently and a team player.

•         Passion to learn new skills.

•         Ability to multi-task and meet deadlines.

•         Driven, motivated, takes initiative and meticulous.